Symposium K
Non-volatile Memory Devices: materials, emerging concepts and applications


Session K-1 -  Resistance Switching Memories (ReRAM)

K-1:IL01  New Trends and Progress in Redox-based Resistive Switching Memories
I. VALOV, Research Centre Juelich, Electronic Materials (PGI-7), Juelich, Germany

Redox based resistive switching memories (ReRAM) have strongly developed in the recent years, leading to the release of first commercial products on the market. Despite the intensive work and achievements, still open questions on the fundamentals exist. The present contribution will focus on the recent progress on fundamental understandings on the cells based on both electrochemical metallization (ECM) and valence change (VCM) mechanisms. Three main aspects will be addressed – i) the influence of moisture on both ECM and VCM type cells. It will be demonstrated that moisture can have essential impact on the cell behaviour; ii) the influence of cation mobility in VCM type cells will be discussed, and it will be highlighted that by selective surface manipulations a VCM to ECM transition can be achieved in Ta/TaOx based devices; iii) the influence of the electrode materials i.e. their electrocatalytic activity on the electrochemical processes and resistive switching will be presented.     

K-1:IL02  Structural Changes and Conductive Filament Formation in Silicon Oxide during Resistance Switchings
A.J. KENYON1, A. MEHONIC1, M. BUCKWELL1, L. MONTESI1, M. SINGH MUNDE1,2, D. GAO3, S. HUDZIAK1, R.J CHATER4, S. FEARN4, D. MCPHAIL4, M. BOSMAN2, A.L. SHLUGER3, 1Department of Electronic & Electrical Engineering, UCL, London, UK; 2Institute of Materials Research and Engineering,
Singapore; 3Department of Physics and Astronomy and London Centre for Nanotechnology, University College London, London, UK; 4Department of Materials, Imperial College London, London, UK

Silicon oxide has for many years provided engineers with an ideal insulator. Silicon microelectronics still relies on its physical, chemical and, above all, electrical durability; modern devices incorporate few-nanometre thick oxide layers in which the electrical stress can be extreme. Here, we report the highly dynamic structural and electrical behaviour of thin silicon oxide films under voltage stress. We show, using a combination of electrical measurements, structural measurements, in situ ion detection and mass spectroscopy, along with DFT and Monte Carlo models, that realistic device voltages can generate major changes to the oxide that are reflected in high contrast resistance switching. In some cases these changes are reversible; in others they are permanent precursors to dielectric breakdown. We also show conductive atomic force microscopy tomography of conductive filaments. These reveal the internal structure of conductive filaments, which is likely to result from the inhomogeneous nature of the amorphous oxide matrix. Our results have major implications for the use of silicon oxide in electronics and photonics – rather than a passive, stable insulator prior to breakdown it is instead a highly dynamic electrically manipulated system.
1 Department of Electronic & Electrical Engineering, UCL, Torrington Place, London WC1E 7JE, UK.  2 Institute of Materials Research and Engineering, 3 Research Link, Singapore 117602.  3 Department of Physics and Astronomy and London Centre for Nanotechnology, University College London, Gower Street, London WC1E 6BT.  4 Department of Materials, Imperial College London, South Kensington Campus, London SW7 2AZ, UK

K-1:L03  Impact of Cation-stoichiometry on Switching Speed and Data Retention in SrTiO3 Thin Film Devices
N. RAAB, C. BÄUMER, S. MENZEL, R. DITTMANN, Peter Gruenberg Institut, Forschungszentrum Juelich GmbH, Juelich, Germany; K. FLECK, Institut fuer Werkstoffe der Elektrotechnik (IWE-2), RWTH Aachen, Aachen, Germany

SrTiO3 is a model material for resistive switching oxides. Among various proposed switching models, the filamentary switching based on oxygen migration is widely accepted for SrTiO3. It is generally assumed that defects have a strong impact on the resistive switching properties of SrTiO3. However, the correlation between different types of defects present in thin film devices and the resistively switching properties remains elusive. We fabricated single-crystalline SrTiO3 thin films with different cation ratio to investigate the stoichiometry-related and therefore defect-dependent influence on the resistive switching properties. Beyond a certain degree, non-stoichiometry is accommodated by the formation of extended defects rather than by point defects which are the dominant defect type in the more stoichiometric case. In the devices with either Ti- or Sr-excess a lower current in the pristine state and a higher current in the low resistance state was observed. These non-stoichiometric devices exhibit a larger memory window and a significantly better data retention.[1] We will present a consistent explanation for this modified switching properties in non-stoichiometric thin film devices, supported by an estimation of the filament diameters.
[1] N. Raab, AIP Advances (5), 2015

K-1:L04  Investigation of Ions Movement during the Operation of Al2O3-Based CBRAM using Thermodynamic and Kinetic Approaches

As the actual non-volatile memories are reaching their limits in terms of scale and power consumption, a new candidate has to be found. The Oxide-based Conductive Bridge RAM is a good candidate. It relies onto the formation of a Cu-rich conductive filament inside an oxide based insulating layer and combines metal ions movements of CBRAM with oxygen vacancies based mechanisms of Oxyde RRAM. However, the switching mechanisms of this stack require further investigation. Using atomistic simulations based on density functional theory, and electrical characterizations of our Al2O3\CuTe-based device integrated in 1-Resistor (1R) and 1-Transistor 1-Resistor (1T1R) configurations, we studied all the ion exchanges between Al2O3 and CuTe-based layers, assuming perfect or defective gamma-Al2O3 resistive layer. First we showed by experiments that copper facilitates forming. Then we used thermodynamic approaches to compute the energy cost associated to the various ion exchanges between Al2O3 and CuTex. Finally we calculated the barrier heights to move one ion from one site to the other in the resistive layer using Nudged Elastic Band calculation. Notably, we propose that Cu ions injection in Al2O3 is strongly enhanced by the oxygen and aluminum point defects generated during the forming step.

K-1:L05  Resistive Switching and Nanoscale Electronic Transport in Au/Nb:SrTiO3 Schottky Junctions
R. BUZIO, A. GERBI, E. BELLINGERI, CNR-SPIN Institute for Superconductivity, Innovative Materials and Devices, Genova, Italy; A.S. SIRI, D. MARRÉ, Physics Department, University of Genova, Genova, Italy

Whenever a Schottky barrier is formed at the junction between large work function metals and electron-doped SrTiO3 (STO), the macroscopic rectifying transport is accompanied by a resistance switching (RS) behaviour. Metal/Nb-doped STO (NSTO) junctions represent a model system for the elucidation of the mechanisms driving RS. Here we report on the fabrication and electrical characterization of Au/NSTO single-crystal junctions with nanometer thick electrodes. Unexpectedly, we observe the coexistence within the same device of highly rectifying properties - under laboratory air - and bipolar RS - under reducing vacuum conditions [1]. Furthermore, we use Scanning Tunnelling Microscopy - Ballistic Electron Emission Microscopy to provide direct experimental evidence for the inhomogeneous character of the Au/NSTO interface at the nanoscale [2]. We suggest that the voltage-dependent variation of the low barrier nanometric patches could explain RS effects in transition-metal oxide cells.
[1] R. Buzio, A. Gerbi, et al. Appl. Phys. Lett. 101, 243505 (2012). [2] A. Gerbi, R. Buzio, et al. Adv. Mater. Interfaces 1, 1300057 (2014)

K-1:L08  Switching Performance of CMOS Integrated HfO2-based Resistive Memory Cells
C. WENGER1, E. PEREZ1, A. GROSSI2, C. ZAMBELLI2, P. OLIVO2, 1IHP GmbH - Leibniz Institute for innovative microelectronics, Frankfurt, Germany; 2Department Engineering ENDIF, Universitá degli Studi di Ferrara, Ferrara, Italy

Due to their simplicity, low-power operation, high speed, and scalability resistive random access memories (RRAMs) with 1 transistor-1 resistor (1T1R) architecture have been extensively explored for embedded and high density nonvolatile memory (NVMs) applications. The development of a robust RRAM technology architecture with a specific design of a 1 transistor-1 resistor (1T-1R) structure as well as of a 4 kbit memory array with periphery in a 250 nm BiCMOS technology node on 200 mm wafer size will be reported. Among various resistive switching (RS) materials, HfO2 is suggested as one of the most promising candidate for RRAM devices caused by its compatibility with the current semiconductor fabrication process. However, so far most of RRAM researches have been focused their studies on improving the performance and understanding the unclear RS mechanism, rather than a consideration of current environment of semiconductor processing. This paper is about integration issues of HfO2 layers with various deposition conditions.

K-1:L09  Ab-initio Modeling of the Evolution of Oxygen Vacancies due to Heating and Electric Fields in HfO2-RRAM
L. SEMENTA, M. MONTORSI, L. LARCHER, University of Modena and Reggio Emilia, Modena, Italy

Researching new architectures and storage mechanisms has been attracting great attention and investment from the main electronics-companies whose aim is improving memory-devices in terms of speed and dimension. Metal-Oxide Resistive random access memories RRAM based on 'filamentary switching' represent a very promising candidate for the future market of memory devices in which the extreme device downscaling still remains compatible with excellent attainable performances and good industrial compatibility. Notwithstanding the theoretical and experimental efforts, the physico-chemical changes occurring in the Insulating Metal Transition have not been fully identified. Although the presence of a less resistive filament has been observed by Transmission Electron Microscopy (TEM) and Conductive Atomic Force Microscopy (C-AFM), it is still unclear how shape, growth and local composition of the filament evolves during the electrical operation leading to the switching. Furthermore a debate exists regarding the mechanisms of charge transport (coherent tunnelling, or trapped assisted by phonons) in the LRS, and regarding the electronic defect configuration that assists the electronic transport. Via in-silico modelling, we provide key information on the physico-chemical mechanisms governing the HfO2-RRAM operations, like forming and switching. In particular, we describe the atomistic structure of the material corresponding to conductive filament conditions which can assist a charge transport. The evolution of the filament shape and composition due to the re-organization of the oxygen vacancies after heating and under the effect of an external electric field during the switching operation are further investigated. Our study is meant to unravel the role of the temperature and external electric fields in modulating the electrical properties, endurance and data retention of sub-stoichiometric HfO2 based RRAM.

K-1:L10  Potential Fluctuation in RRAM based on Non-stoichiometric Hafnium Sub-oxides
D.R. ISLAMOV1,2, V.N. KRUCHININ1, V.SH. ALIEV1, T.V. PEREVALOV1,2, V.A. GRITSENKO1,2, I.P. PROSVIRIN3, O.M. ORLOV4, A. CHIN5, 1Rzhanov Inst.of Semiconductor Physics SB RAS, Novosibirsk, Russian Fed.; 2Novosibirsk State University, Novosibirsk, Russian Fed.; 3Boreskov Inst. of Catalysis SB RAS, Novosibirsk, Russian Fed.; 4JSC Molecular Electronics Research Inst., Zelenograd, Russian Fed.; 5National Chiao Tung University, Hsinchu, Taiwan

In modern silicon devices SiO2 is superseded by high-κ dielectrics, such as HfO2, ZrO2, Ta2O5 etc. Hafnia (HfO2) permittivity depends on the modification, varies in the range of 12-40. HfO2 is the promising material for CMOS devices, DRAM capacitors, NV memory devices. Of great interest is the use of nonstoichiometric hafnium suboxides HfOx (x<2). Variation of HfOx chemical composition (stoichiometry) leads to changes in its electronic structure, which opens up the possibility of controlling the physical (optical and electrical) properties. Purpose of the present work is to study the atomic and electronic structure of variable composition HfOx. We study the structure of nonstoichiometric HfOx films with variable composition using methods of XPS, spectroscopic ellipsometry, and ab initio calculations. According to XPS and optical absorption experiment data HfOx consists of metal Hf and ~10-15% of nonstoichiometric hafnium sub-oxide HfOy (y<2) HfOy. HfOy can be placed between HfO2 and Hf, inside HfO2, inside Hf. According to this model space fluctuations of chemical composition cause space fluctuations of bandgap in HfOx. We found that transport in such electronic systems is described by percolation theory. This approach can be applied to explain LRS transport of HfO2-based RRAM.

K-1:IL12  Different Applications of Memristors Enabled by Selector Devices
J. JOSHUA YANG, University of Massachusetts, Amherst, MA, USA

Resistance switches have exhibited great scalability, ultra-fast switching speed, nonvolativity, large HRS/LRS memory window, analogue resistance change, non-destructive reading, good 3D stack-ability, great CMOS compatibility and manufacturability. Numerous perspective applications have been proposed based on these attractive device properties. However, each application emphasizes on different aspects of device performance and imposes different requirements on the device properties as shown in the figure. In order to meet these requirements, a practical solution is to add an auxiliary device to each of the resistance switch. Accordingly, a two-terminal thin-film device is developed as the auxiliary device in this study. The new device can be engineered with over 1010 nonlinearity to realize large crossbar arrays for non-volatile memory applications. It can also be tuned with timing functions to enable a realistic spike-timing dependent plasticity (STDP) for neuromorphic computing applications.

K-1:L13  Switching Kinetics of Ta2O5-based ReRAM: Limiting Processes and Ultimate Switching Speed
S. MENZEL1, A. MARCHEWKA2, B. RÖSGEN1, W. KIM1, V. HAVEL2, K. FLECK2, V. RANA1, U. BÖTTGER2, D. WOUTERS1, R. WASER1,2, 1Forschungszentrum Jülich, Peter Grünberg Institut (PGI-7), Jülich, Germany; 2RWTH Aachen, Institut für Werkstoffe der Elektrotechnik (IWE 2), Aachen, Germany

Redox-based resistive switching devices have attracted great attention for future use non-volatile memory applications, e.g. redox-based random access memories (ReRAM). A ReRAM cell typically consists of a simple metal-insulator-metal (MIM) structure and can be switched between a low resistive state and a high resistive state. In this work the switching kinetics of Pt/Ta2O5/M/Pt cells are investigated under different ambient temperatures and their dependence on the choice of the M-electrode material. The experimental data is analyzed using a Schottky-contact switching model that is based on the movement of oxygen vacancies. The SET switching kinetics have been studied in a range from 100 ps to 105 s. The analyses reveal that not only thermally-accelerated drift but also a further electric-field enhanced process determines the switching speed. By comparing the switching kinetics of different M-electrode materials, this second process can be related to an oxygen exchange mechanism at the M/Ta2O5 interface. Furthermore, it is demonstrated that the ultimate switching speed is approached in the ps-regime. The experimentally determined RESET kinetics exhibit a gradual nature. Simulations show that the gradual nature is related to a drift-diffusion balance of the mobile oxygen vacancies.

K-1:IL14  Engineering Defect Levels and Strain Fields as Functional Oxide Building Blocks for Novel ReRAM Architectures
R. SCHMITT, E. SEDIVA, R. KOROBKO, F. MESSERSCHMITT, S. SCHWEIGER, M. KUBICEK, J.L.M. RUPP, ETH Zurich, Department of Materials, Electrochemical Materials, Zurich, Switzerland  

Nanoscale resistive switches (ReRAM) were recently proposed as a new class of non-volatile switches capable of reading, writing and erasing memory information by switching non-linearly between low- and high-resistance values by application of mV voltage pulses in the ns range. In the last years, resistive switching has been reported for various classes of materials ranging from sulfides to oxides. Through this paper we want to elucidate novel findings and innovation on the fields of material and structure development for oxygen anionic-electronic conducting valence change ReRAM. Firstly, we present a new type of a model material device concept entitled "a strained ReRAM". Here, new material engineering of oxides are discussed to control resistive switching device properties like retention, Ron/Roff ratios and power consumption by "interfacial strain engineering of mixed conducting oxide". Lattice strain engineering using heterostructures at internal interfaces can be used to tune material properties in micro-dots as new resistive switching architectures far beyond the change accessible by classic solute solution doping in valence change oxides. We exemplify the switching characteristics based on either compressively or tensily strained Gd0.1Ce0.9O2-x heterolayers by Er2O3 or Sm2O3 monolayer modulation, respectively, and discuss directly the device implication. Secondly, we turn to the role of electric field and frequency dependencies of SrTiO3 ReRAM switching bits based oxygen anionic-electronic conductors in an unusual combination of methods. Here, on- and off equilibrium electrochemical impedance spectroscopy and chronoamperometry are used to investigate the best operation conductions to implicate on fast switching and stable retention with high resistance modulation for the devices. Thereby, the capacitive and memristive contributions can be separated and discussed towards optimum operation, as well as diffusion constant characteristics of the materials involved can be accessed. The "Memristor-based Cottrell equation" is used to determine successfully diffusion kinetics in these anionic-electronic resistive switches. Thirdly, we grow nanoscopically-rough LaFeO3 switching bits and demonstrate in a model experiment for an amorphous and epitiaxially oriented films the implication of grain-boundary free but varying defect levels of the structures on resistive switching. We compliment classic resistive switching tests characterizing the near order Raman vibrational (ionic bonding), direct and non-linear optic spectroscopy techniques (electronic contributions) and implicate on the potential application of these rather stable and novel resistive switching architectures. Finally, first results on multi-level switches and serial connections of oxygen anionic-electronic conducting oxide-based siwtches and circuits are presented and discussed for potential logic applications.

K-1:L16  The Resistive Switching Behavior of ZnO Films Depending on Li Dopant Concentration and Electrode Materials
A. IGITYAN, Y. KAFADARYAN, N. AGHAMALYAN, S. PETROSYAN, Institute for Physical Research of NAS of Armenia, Ashtarak, Armenia  

Today memristors (resistance switching memory devices) have considerable research interest because of their favorable multilevel storage capability, fast switching speed (<10 ns), excellent scalability, good reproducibility, synapse-like behavior and low power consumption. Metal/oxide/metal (MOM) structures with Lithium-doped ZnO as oxide layer (0%, 1% and 10 % Li), and Al, Ag, Au, Pt, LaB6, SnO2:F (20% F) as electrodes were studied to find their memristive characteristics. The resistance switching properties (unipolar – URS, bipolar BRS and monostable threshold (MTS) modes, memory endurance, retention time, number of writing and erasing cycles) were investigated depending on electrode material, lithium concentration, polarity of applied voltage, forming and annealing processes. Unipolar switching mode is detected on Ag/ZnO:Li10%/Pt structure, while coexistence of URS and MTS polarity-dependent modes are found on Al/ZnO:Li10%/LaB6 structure. Additionally, nonvolatile bipolar resistance memory properties with high memory endurance were observed on transparent ZnO:10%Li/SnO2:20%F structure, which can find its application in transparent optoelectronic devices. BRS and URS modes are described by interfacial Schottky conductance and filamentary conductance models, respectively.

K-1:IL18  Study of the Resistive Switching Effect using a Three Terminal Bipolar Device
E. YALON, Technion, Israel Institute of Technology, Haifa, Israel, Current address: Stanford University, Stanford, CA, USA; D. RITTER, Technion, Israel Institute of Technology, Haifa, Israel 

The implementation of resistive switching random access memory (RRAMs) is hampered by the lack of full understanding of the switching and conduction mechanism as well as the lack of detailed physical models. Most studies of the switching phenomena are carried out using 2-terminal metal-insulator-metal structures. In this talk, a 3-terminal metal-insulator-semiconductor bipolar transistor structure will be presented. The insulator layer in the structure is a resistive memory film. We will show how this structure provides useful information on the conduction, temperature, and switching effects in thin films. We will demonstrate how the local filament temperature is determined on a nano-metric scale by analyzing the thermal excitation rate of electrons from the filament quasi-Fermi level into the conduction band of a p-type semiconductor electrode. This information is crucial, since the local temperature plays a key role in the switching effect.

K-1:L19  Understanding of the Combined Threshold and Memory-Type Resistive Switching Behavior in Pt/NbOx/Ti/Pt Cells built from Amorphous Nb2O5 Films
S. HOFFMANN-EIFERT1, C. FUNCK1,2, N. ASLAM1, S. MENZEL1, E. LINN2, R. WASER1,2, 1Forschungszentrum Juelich, PGI-7, and JARA-FIT, Juelich, Germany; 2Institute of Materials in Electrical Engineering and Information Technology, RWTH Aachen University, Germany

Redox-based resistive switching memory cells (ReRAM) are intensively studied for next generation storage class memory due to the simple device structure and low power consumption combined with non-volatility and good endurance. A high integration density can be achieved for passive crossbar arrays. However, the inherent leakage current through unselected cells limits the maximum size of the crossbar array. Device concepts which can solve this problem comprise complementary resistive switches, and selector elements built from threshold-type devices like for example NbO2 which typically show a negative differential resistance characteristic. This volatile resistance change can be utilized for realization of a highly non-linear selector element. We have shown that a TS-ReRAM element can be built from a simple Pt/Nb2O5/Ti/Pt stack fabricated from a 10 nm thick amorphous Nb2O5 layer grown by atomic layer deposition and integrated into 100 nm x 100 nm crossbar structures. Here, we present an analysis of the resistive switching behavior derived from an analytical approach and further expanded by numerical simulation of the current-voltage characteristics using a continuum model.
This work was supported in part by the Deutsche Forschungsgemeinschaft SFB917 and under Grant LI2416/1-1

K-1:IL20  Morphology-assisted Electrical Memory Performances of Well-defined Brush Polymers
MOONHOR REE, SUNGJIN SONG, JINSEOK LEE, DONGWOO WI, YONGJIN KIM, HOYEOL LEE, BRIAN J. REE, POSTECH, Dept. of Chemistry, Division of Advanced Materials Science, Pohang Accelerator Laboratory, and Polymer Research Institute Pohang, Republic of Korea 

A series of well-defined brush polymers bearing charge-trapping moieties were investigated in aspects of nanoscale thin film morphology and electrical memory device performances. Synchrotron grazing incidence X-ray scattering and X-ray reflectivity analyses found that the brush polymers either self-assemble or phase-separate in nanoscale thin films, forming a variety of nanostructures and orientations depending on the chemical architectures and the film process conditions. Such thin film morphology and orientations made significant impacts on the memory device performances including memory modes. The device performances were further influenced by the molecular orbital natures of brush polymers, in particular electrical active functional moieties. Moreover, the individual brush polymer systems had a ceratin thickness window to reveal electrical memory behavior. We will discuss the device performances in the correlation of molecular orbital nature, chemical architecture, thin film morphology, structural orientation, and film thickness in addition to charge trapping and transportation.

Session K-2 - Phase Change Memories (PCM)

K-2:IL01  Phase-change Memories for Energy-efficient Data-centric IT Applications
P. FANTINI, Micron - Process R&D, Vimercate, Italy

After the demonstration to enter into the mass production by PCM, new advanced technology developments must be addressed. Considering alternative non volatile memory technologies, PCM is still one big player that is competitive through different memory segments. However, in order to be effective through different application scenarios, new phase change materials need to be evaluated on top of the well know GST225, tailoring the different needs. As an example, embedded segment (automotive market, in particular) is continuously demanding for larger retention capabilities without losing other electrical performances (low programming current, good read window, fast set-ability, high endurance…) still preserving the scalability aspect. However, a look to the memory market for the next decade indicates an explosion of data center for “cloud” systems. Aim of this talk is to describe the starting point of actual PCM technology inside the general memory trend, to highlight main challenges for the future technology nodes and show the main strategy to physically and electrically screen alternative phase change materials to face new markets, in particular the data centers for IT applications, with the need to improve the PCM energy efficiency.

K-2:IL02  Epitaxial Chalcogenide Superlattices for Memory Application
R. CALARCO, Paul-Drude-Institut für Festkörperelektronik, Berlin, Germany

Molecular beam epitaxy (MBE) is a well established deposition method and has been successfully used to fabricate epitaxial phase change materials, making advanced studies on the properties of these materials possible. First, we will demonstrate the feasibility of using MBE for fabricating memory device that are in-line with industrial standards. MBE also offers a high degree of control of the deposition rates of individual elements. This aspect makes the technique attractive for studying chalcogenide superlattices (GeTe-Sb2Te3) which are under intense investigation for non-volatile memory applications. Finally, we will show that the programming current of phase change materials (PCM) can be reduced by using superlattices. This improvement results in a reduction of the power consumption of PCM devices and makes PCM more attractive for future applications.

K-2:IL03  Advances in Nanowire-based Phase Change Memories
M. LONGO, Laboratory MDM, IMM-CNR, Agrate Brianza, Italy

Phase change nanowires (PC-NWs) are promising candidates for ultra-scaled phase change memory (PCM): the reduction of the programming volume lowers the set and reset currents. PC-NWs have also shown a reduced thermal conductivity and proximity disturbance and the introduction of alternative alloys other than Ge2Sb2Te5 or core-shell geometries can further improve the NW-based PCM performances; one of the issues about PC-NWs is their controlled positioning and CMOS compatibility [1]. Last results on PC-NW devices will be illustrated, in particular from the EU-FP7 SYNAPSE project, regarding the metalorganic chemical vapor deposition (MOCVD) of NWs of In-Sb-Te, In-Ge-Te and Ge:(Sb-Te), with their chemical-structural, electrical and morphological properties. Other significant outcomes will be reported, such as the large scale molecular dynamics simulations of crystallization processes, the identification of a new Sb2Te3 NW polymorph, a new method for the measurement of the NW thermal conductivity, the study of the NW positioning by self-assembly and selective template filling.
The SYNAPSE consortium is acknowledged.
[1] M. Longo in “Advances in Non-volatile Memory and Storage Technology”, Woodhead Publishing-Elsevier, edited by: Y. Nishi, June 2014, p. 200-261

K-2:L05  Epitaxial Trigonal Ge-Sb-Te Alloys: Model Materials for Future Low Energy Consumption Non-volatile Memory Applications?
H. HARDTDEGEN1, S. RIEß1, M. SCHUCK1, K. KELLER1, P. JOST2, M. BORNHÖFFT3, H. DU4, A. SCHWEDT3, J. MAYER3,4, G. ROTH5, G. MUSSLER1, M. VON DER AHE1, D. GRÜTZMACHER1, M. MIKULICS1, 1Peter Grünberg Institute (PGI 9) and JARA - Fundamentals of Future Information Technology, Forschungszentrum Jülich GmbH, Germany; 2I. Physikalisches Institut (IA), RWTH Aachen University; 3Central Facility for Electron Microscopy, RWTH Aachen University, Germany; 4Ernst Ruska-Centre, Forschungszentrum Jülich GmbH, Germany; 5Institute for Crystallography, RWTH Aachen University, Germany

The interfacial phase change memory (iPCM) based on GeTe-Sb2Te3 superlattices has been reported to be a suitable approach to reduce energy consumption in data storage applications. A field-induced transition from the conductive to the highly resistive state is postulated to occur from one solid phase to another without melting. Recently, we presented the deposition of trigonal Ge1Sb2Te4 / Si (111) by the industrially relevant method metalorganic vapor phase epitaxy (MOVPE). The trigonal layers exhibit some structural “ingredients” of an iPCM superlattice. Here, detailed structural studies as well as first growth and characterization studies on further trigonal Ge-Sb-Te alloys will be shown. The studies indicate that alternating planes of cations and anions are present and that the Ge and Sb cations mix. The film accommodates to the substrate by forming defects within the first few nanometers of growth. All in all, the highly ordered trigonal Ge-Sb-Te alloys grown by MOVPE will contribute to the understanding, improvement and control of the iPCM switching mechanism still under debate.

K-2:L06  Au-catalyzed Synthesis and Characterization of In-Ge-Te Nanowires by MOCVD
R. CECCHINI1, S. SELMO1,2, C. WIEMER1, M. FANCIULLI1,2, E. ROTUNNO3,  L. LAZZARINI3, L. CACCAMO4, A. WAAG4, B. SHEEHAN5, S. MONAGHAN5, K. CHERKAOUI5, P.K. HURLEY5, M. LONGO1, 1Laboratorio MDM, IMM-CNR, Unità di Agrate Brianza, Agrate Brianza, (MB), Italy; 2Dipartimento di Scienza dei Materiali, University of Milano Bicocca, Milano, Italy; 3IMEM-CNR, Parma, Italy; 4Institut für Halbleitertechnik and Laboratory for Emerging Nanometrology, Technische Universität Braunschweig, Braunschweig, Germany; 5Tyndall National Institute, University College Cork, Dyke Parade, Cork - Ireland

Chalcogenide nanowires (NWs), grown by bottom-up processes, are promising candidates for the realization of ultra-scaled phase change memory (PCM) devices. Moreover, alloys of the In-Ge-Te (IGT) system are expected to have useful properties for PCM applications, e.g. improved thermal stability with respect to those of the Ge-Sb-Te (GST) system. Here, we report, for the first time, on the synthesis of high-density and ordered IGT NWs on Si (100) and Si (111) substrates by a metal organic chemical vapor deposition (MOCVD) based process, coupled to vapor-liquid-solid (VLS) mechanism, catalyzed by Au nanoparticles (NPs). Compositional, morphological and microstructural properties of the grown structures as a function of the process parameters were investigated. NWs have lengths of a few microns, diameters down to 15 nm and specific growth directions with respect to the substrates. The NWs were also harvested and contacted on SiO2/Si substrates and their electrical properties were investigated. The possibility of selective template filling by IGT NWs was also explored.

K-2:L07  Operation Fundamentals of Phase Change Memory Devices based on Ge-rich GST Materials and Featuring High Reliability Performances
V. SOUSA, G. NAVARRO, N. CASTELLANI, M. COUÉ, O. CUETO, C. SABBIONE, V. DELAYE, F. FILLOT, P. NOÉ, L. PERNIOLA, CEA-LETI, Grenoble Cedex, France; S. BLONKOWSKI, STMicroelectronics, Crolles, France; P. ZULIANI, R. ANNUNZIATA, STMicroelectronics, Agrate Brianza, Italy

In our recent work, we have confirmed the high reliability performances of Phase Change Memory (PCM) devices based on Ge-rich GST materials. We have shown with the characterization of a 12Mb test vehicle that the data retention can be guaranteed in an extended temperature range. In this paper, we focus on the understanding of the high thermal stability of the two programmed states. Concerning the high resistance RESET state, we demonstrate that the strong opposition against crystallization relates to the elemental distribution within the PCM layer. In fact, following the initial electrical activation of the device, the composition at the core of the storage element tends toward a Ge-rich GST alloy exhibiting a high crystallization temperature. Concerning the low resistance SET state programmed under optimized conditions, we relate the low resistance drift to the low number of grain boundaries along the conductive path. Multi-physical simulation results account for the experimental observations, demonstrating how the segregation phenomena and the localization of the electronic switching impact both the elemental distribution and the formation of the crystalline structure during programming.

K-2:IL08  Atomistic Simulations of the Heterogeneous Crystallization of Phase Change Materials
M. BERNASCONI, Department of Materials Science, University of Milano-Bicocca, Milano, Italy; A. BOUZID, C. MASSOBRIO, Institut de Physique et Chimie des Materiaux de Strasbourg, University of Strasbourg-CNRS, Strasbourg, France; S. CARAVATI, Department of Chemistry, University of Zurich, Zurich, Switzerland

One of the key properties that make phase change materials suitable for applications in memories is the high speed of crystallization of the amorphous upon Joule heating. In the actual devices, crystallization of the prototypical compound Ge2Sb2Te5 proceeds via nucleation and growth. Homogeneous nucleation is a stochastic process with a maximum rate in a narrow temperature range between the glass transition and the melting temperature. Crystal growth velocity of the supercritical nuclei is typically a milder function of temperature with a plateau in a wider temperature range thanks to the fragility of the supercooled liquid. By shrinking the cell size nucleation will become less and less probable and will affect the reliability and cell-to-cell variability in memory arrays. A possible route to overcome this criticality it to promote crystal nucleation at the interface between the active material and the surrounding dielectrics or metallic electrodes. By means of molecular dynamics simulations based on Density Functional Theory, we have investigated the process of crystal nucleation at the interfaces between phase change alloys and metallic electrodes. Results on the kinetics of heterogeneous crystallization of GeSbTe, GaSbTe and InSbTe alloys will be discussed.

K-2:L10  Integrated All-photonic Data Storage Enabled by Phase-change Materials
C. RIOS1, M. STEGMAIER2, P. HOSSEINI1, C.D. WRIGHT3, W. PERNICE2,4, H. BHASKARAN1, 1Department of Materials, University of Oxford, Oxford, UK; 2Institute of Nanotechnology, Karlsruhe Institute of Technology (KIT), Eggenstein-Leopoldshafen, Germany; 3Department of Engineering, University of Exeter, Exeter, UK; 4Department of Physics, University of Muenster, Muenster, Germany

Optical switching between clearly differentiable states in a non-volatile manner is of high interest in integrated photonics due to its applications in data storage and tunable devices. Ge2Sb2Te5 (GST) phase-change alloy has the potential to achieve this, thanks to the contrast in its complex refractive index when switching between well characterized and non-volatile crystallographic states: the crystalline and the amorphous. Moreover, GST allows for reversible ultrafast optical switching between those states. The conjunction of these properties meant that a truly all-photonic integrated multi-level memory element that can store data permanently was recently demonstrated by our collaborative team. To do so, we have placed nanoscale junctions of GST onto nanophotonic waveguides and have used a pump-probe experiment to switch the material using evanescent field of optical pulses combined with optical read-out. We have demonstrated bit storage of up to 8 levels in transmission associated to different levels of GST crystallization, speeds approaching 1 GHz and switching energies as low as 13.4 pJ. This memory element promises to solve the latencies associated with electronic memories in Von-Neumann architectures and to eliminate the need for optoelectronic conversions.

K-2:L11  Phase Change Material based Non-volatile Optoelectronic Interface for Optical Systems
G. RODRIGUEZ HERNANDEZ, P. HOSSEINI, C. RIOS, H. BHASKARAN, Oxford University, Department of Materials, Oxford, UK; C.D. WRIGHT, University of Exeter, Engineering Department, Exeter, UK

Recently, the use of optical systems has allowed the development of new applications in fields like sensing or communications. A key component for these applications is the transducer that converts an optical signal into electrically readable data. In this study we present an optoelectronic device used to interface optical and electrical systems by means of the intrinsic properties of phase change materials. The device consists of a thin film of Ge2Sb2Te5 (GST) deposited between two transparent electrodes. When the device is exposed to an optical pulse, a phase change is induced in the GST. Due to the difference in the electrical properties of the GST between its amorphous and crystalline states, it is possible to electrically detect the optically induced change even when the stimulus is no longer present. The addition of such memory function to an optoelectronic interface has the potential to pave the way for a new set of applications in high speed optical communications and instrumentation.

Session K-3 - Magnetic, Ferroelectric and Multiferroic Materials for Memory Devices

K-3:IL01  Nano Spintronics Devices for CMOS Integration
HIDEO OHNO, Laboratory for Nanoelectronics and Spintronics, RIEC; Center for Spintronics Integrated Systems; Center for Innovative Integrated Electronics; WPI Advanced Institute for Materials Research, Tohoku University, Sendai, Japan

I review physics and materials science of nanoscale spintronic devices being developed for nonvolatile VLSI. VLSIs can be made high performance and yet standby-power free by using nonvolatile spintronics devices. The most commonly employed device is magnetic tunnel junction (MTJ), a two-terminal spintronic device that can scale beyond 20 nm with perpendicular CoFeB-MgO. I will briefly describe the development of such devices and then discuss about the models put forward to understand the device size dependence of the thermal stability factor of MTJs; one being nucleation limited and the other domain wall propagation limited. Three-terminal devices, which is another important entity more suitable for high speed operation, are then discussed. We have investigated three-terminal devices utilizing current-induced domain wall motion and more recently its variant using spin-orbit torque (SOT). Here, I discuss about SOT devices utilizing the spin Hall effect of antiferromagnet to eliminate the need for external magnetic field. If time allows, I will touch upon electric-field switching of magnetization in perpendicular CoFeB-MgO magnetic tunnel junctions.
Work supported by the FIRST Program from JSPS, ImPACT from JST, and by the R & D for Next-Generation Information Tech. from MEXT

K-3:IL02  Ferroelectric HfO2 for Non-volatile Memory Devices
U. SCHROEDER, T. SCHENK, M. HOFFMANN, C. RICHTER, M. PEŠIĆ, F. FENGLER, S. SLESAZECK, NaMLab gGmbH, Dresden, Germany; T. MIKOLAJICK, Chair of Nanoelectronic Materials, TU Dresden, Dresden, Germany; R. MATERLIK, C. KÜNNETH, A. KERSCH, Munich University of Applied Sciences, Munich, Germany; X. SANG, J.M. LEBEAU, North Carolina State University, Raleigh, NC, USA; S.V. KALININ, Oak Ridge National Laboratory, Oak Ridge, TN, USA 

With the recent discovery of the ferroelectric (FE) properties in doped HfO2 the interest in FE based non-volatile memory devices is growing. Continuous research is ongoing to understand the root cause of this so far unknown phase. The FE properties were investigated for different thicknesses, electrode materials and annealing conditions. Piezo-response force microscopy in conjunction with transmission electron microscopy measurements revealed a domain size in the order of single grains with a grain diameter of ~20-30 nm. The size distribution of the grains follows a Poisson distribution resulting in a grain size dependent coercive field and Curie temperature. Ab initio simulations confirmed the influence of oxygen vacancies on the phase stability of ferroelectric HfO2. A qualitative model describing the influence of other basic parameters like stress, dopant concentration, grain size on the structure was proposed. In addition, the influence of these parameters on the field cycling behavior was examined. This revealed the wake-up effect in doped HfO2 to be dominated by interface induced effects. With the understanding of the basic parameters to form the FE phase the typical switching characteristics of FE HfO2 based non-volatile memory devices can be explained.

K-3:L03  Hafnium Oxide based Ferroelectrics prepared by Chemical Solution Deposition
S. STARSCHICH, U. BÖTTGER, RWTH Aachen University, Institut für Werkstoffe der Elektrotechnik II, Aachen, Germany 

After the first publication on ferroelectric doped hafnium oxide in 2011 a great progress has been made in understanding the origin of this unusual ferroelectric material. Contrary to the other groups who mainly deposit the ferroelectric layers by ALD and CVD, we use chemical solution deposition (CSD) for layer preparation. The advantage is the fast and easy layer preparation with similar electrical characteristics compared to ALD. Furthermore the influence of different dopants can be investigated just by adjusting the precursor (already shown for: Y, Al, Mg, Ca, Sr, Ba,Y, La, Zr, Nd, Sm, Er, Yb). In contrast to ALD and CVD the layers prepared by CSD can be deposit with greater thickness (~100nm) and still keep their ferroelectric properties. Therefore the ferroelectric properties can be investigated not only for thin layers. The deposition of ferroelectric hafnium oxide by CSD offers the possibility to understand this extraordinary ferroelectric material in more detail.

K-3:L04  Toward Experimental Implementation of HfO2 based Ferroelectric Tunnel Junctions
A. CHERNIKOVA, D. NEGROV, A. ZENKEVICH, Moscow Institute of Physics and Technology, Dolgopdrudny, Moscow region, Russia 

Due to their immense scalability and manufacturability potential, HfO2-based ferroelectric films attract significant attention as strong candidates for application in ferroelectric memories and related electronic devices. Recently, we have succeeded in the growth of ultrathin polycrystalline ferroelectric Hf0.5Zr0.5O2 (HZO) films with thickness of just 2.5 nm, particularly on Si substrate, as established by the combination of TEM, PFM and pulsed switching testing on TiN/HZO/Si samples [1]. The ferroelectric functionality of ultrathin HZO films makes them suitable for use in ferroelectric tunnel junctions (FTJ), thereby further expanding the area of their practical application. In the current work, we shall present the results of theoretical modeling and experimental measurements of the interfacial electronic structure versus electron transport properties of the tunneling transparent ferroelectric HZO based stacks with different combinations of electrodes (TiN, Pt, n+-, p+-Si, …). The expected results are viewed as a significant step towards experimental implementation of HfO2-based FTJs.
1. A. Chernikova, M. Kozodaev, A. Markeev, M. Spiridonov, S. Zarubin, O. Bak, H. Lu, E. Suvorova, A. Gruverman and A. Zenkevich, “Ultrathin Ferroelectric Hf0.5Zr0.5O2 Films on Si”, subm.

K-3:L05  Formation of Nanoscale BaTiO3 MOSCAPs for Ferroelectric Field Effect Transistor Application
P. PONATH, A. POSADAS, University of Texas at Austin, Austin, TX, USA; M. SCHMIDT, P. HURLEY, R. DUFFY; Tyndall National Institute, University, Cork, Ireland; A.A. DEMKOV; University of Texas at Austin, Austin, TX, USA 

Titanates are an important class of materials with many interesting functional properties and applications for non-volatile memory, i.e. BaTiO3, which is a promising candidate for the realization of a ferroelectric field-effect transistor. However, the difficulty of chemically etching titanates has hindered their commercial use in device manufacturing so far. Here, we report a technique to circumvent this problem. Using molecular beam epitaxy, we grew compressively strained ferroelectric BaTiO3, within photolithographically defined openings of a sacrificial SiO2 layer on germanium (001) with Pt as a top electrode. Etching away the sacrificial SiO2 can reveal isolated nanoscale gate stacks circumventing the need to etch the titanate thin film. Using X-ray diffraction we find that the BaTiO3 film is tetragonal with the longer c-axis being out of plane, which is a requirement for the ferroelectric field effect transistor. The crystal quality of the BaTiO3 films grown in the openings is confirmed using RHEED and cross-sectional transmission electron microscopy. Focused ion beam etching of the Pt layer is then used to electrically isolate a Pt/BaTiO3/SrTiO3/Ge stack to perform electrical measurements.

K-3:IL06  Nonvolatile Resistive Switching in Interface-engineered Ferroelectric Junctions
A. SAWA, A. TSURUMAKI-FUKUCHI, Y. TOYOSAKI, H. YAMADA, National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Ibaraki, Japan 

Ferroelectric resistive switching based on polarization reversal in ferroelectrics has recently attracted considerable interest, because of its potential application to nonvolatile memories with combined advantages of low-power consumption and large capacity. In this study, we found that the resistive switching characteristics in BaTiO3 (BTO)-based ferroelectric tunnel junctions (FTJs) strongly depend on the surface-termination of BTO in contact with a simple-metal electrode of Co or Pt. FTJs consisting of BTO barrier layers with BaO or TiO2 terminations show “eight-wise” or “counter-eight-wise” switching, respectively, suggesting opposing relationships between the polarization direction and the resistance state. The resistance-switching ratio in the junctions can be remarkably enhanced up to 1000, by artificially controlling the fraction of BaO termination. This result can be understood in terms of the termination dependence of dead layer and charge screening, which has been predicted by the first-principles calculations.
We thank M. Kobayashi, H. Kumigashira, and T. Nagai for XPS and TEM studies. Part of this work was financially supported by the JST PRESTO and the JSPS KAKENHI (Grant No. 26286055).

K-3:IL07  Polarization-enabled Electronic Properties of Hybrid 2D-ferroelectric Structures
A. GRUVERMAN, Department of Physics and Astronomy, University of Nebraska-Lincoln, Lincoln, NE, USA 

In recent years there has been an unprecedented interest in various two-dimensional (2D) materials that often possess unique physical and chemical properties. In particular, there was a considerable interest in a novel type of electronic devices, in which graphene, a 2D carbon material, was coupled with different ferroelectric (FE) materials. Electrically switchable ferroelectric polarization opens a possibility of electrical control of the functional properties of the adjacent graphene layer. Here, I discuss implementation of the hybrid electronic devices comprising 2D materials and FE thin films (2D-FE) that exhibit polarization-controlled non-volatile modulation of the electronic transport. While many 2D materials can be considered in conjunction with FE materials, this talk primarily focuses on the use of graphene and transition metal dichalcogenide MoS2. Specifically, we show how polarization reversal modulates (1) the in-plane transport of the interfacial conducting channel in the FE field effect devices, and (2) the perpendicular-to-plane tunneling conductance in the FE tunnel junction devices. We demonstrate that interface engineering is a critical component determining the functional properties of these devices. We use simple phenomenological modeling to predict how the interface chemistry affects the electronic and transport properties of the 2D-FE structures.

K-3:L08  Leakage Currents in FeRAM Capacitors: Mechanisms and Correct Interpretation

Leakage current in ferroelectric capacitor is an important parameter that should be taken into account in ferroelectric random access memory (FeRAM) developing. In this report we make an attempt to analyze possible charge carrier transport mechanisms at different electric fields in FeRAM elements. We present new data on charge transport mechanisms in PZT films having different thickness and microstructure and discuss them in the framework of space charge and dead layer formalism. Experimental study of FeRAM capacitor current-voltage dependences frequently discloses regions with an apparent negative differential conductivity. In this report we propose a new model describing this phenomenon taking into account the polarization relaxation, that provides a good correlation with the experimental data for different kinds of ferroelectric structures. An estimation of the “true” (steady-state) leakage current in FeRAM element takes prolonged measurement time that is restricted by the film degradation as a result of time-dependent breakdown. Therefore, a correct model is needed to obtain the steady-state current value. A new model is proposed providing better accuracy of the steady-state current measurement in FeRAM elements at reduced measurement times.

K-3:L09  Memristive and Magnetoresistive Properties of  SrTiO3 based Junctions
I. BERGENTI, P. GRAZIOSI, A. RIMINUCCI, L. VISTOLI, M. CALBUCCI, F. BORGATTI, V. DEDIU, ISMN CNR, Bologna, Italy; D. MacLAREN, School of Physics and Astronomy,  University of Glasgow, UK 

SrTiO3 (STO) based magnetic tunnel junction have been subject of intense research in the field of spintronics[1]. Only recently STO material has been considered for electrical bistable memory devices[2]. In this work we identify the conditions for magnetic tunnel junction featuring electrical  bistability in devices including manganite (La0.7Sr0.3MnO3-LSMO) and Cobalt (Co) as electrodes. The mechanism behind this phenomenon is still under discussion and several scenario have been proposed mainly related to the use of an oxide electrode (voltage driven oxygen diffusion[3]) or by the functionality of insulating barrier layer (charge trapping and space-charge field inhibition of injection[4]). To gain insight into the combined magnetic and electric behaviour, we exploited a set of investigations on the STO/Co interface as a function of the fabrication method and of the electrical functionality; including X ray photoemission spectroscopy (XAS), Cross sectional Transmission microscopy (TEM), and magnetoelectrical characterization on a cross bar device of composition LSMO/STO/Co . Crystalline epitaxial STO layers exhibit magnetoresistive behaviour in tunnelling regime (2.5nm STO) while amorphous STO layers give rise to bipolar resistive switching. For ultrathin STO amorphous layer (5-7 nm STO) the resistive switching  is associated to magnetoresistive behaviour. Measurements show very rich physics underlying the transport of charge and spin in these device, and an interesting interplay between resistive switching and spintronic properties.
The financial support from the FP7 project NMP3-LA-2010-246102 (IFOX) is acknowledged.
[1] J. M. De Teresa et al. Role of Metal-Oxide Interface in Determining the Spin Polarization of Magnetic Tunnel Junctions. Science 286 (1999). [2]C. Baeumer et al. Spectromicroscopic insights for rational design of redox-based memristive devices Nat. Comm. 6 (2015). [3] R. Waser et al., Nanoionics-based resistive switching memories Nat. Mater. 6 (2007). [4]  J.C. Scott  et al. Nonvolatile memory elements based on organic materials Adv.Mat. 19 (2007).

K-3:IL10  Advances and Challenges in STT-MRAM Technology
V. NIKITIN, D. APALKOV, R. CHEPULSKYY, R. BEACH, S. SCHAFER, V. VOZNYUK, Z. DUAN, M. KROUNBI, Samsung Electronics, Semiconductor R&D Center, San Jose, CA, USA 

Spin transfer torque magnetic random access memory (STT-MRAM) has been considered as promising candidate for next generation non-volatile memory due to a combination of fast speed, excellent scalability, high endurance, and ease of integration with standard CMOS processes. While feasibility demonstrations used devices with in-plane magnetization, significant advances in materials allowed implementation of perpendicular MTJ design, which provides the best long-term scalability for STT-MRAM beyond 20 nm. Despite significant progress, there are many remaining hurdles in productization of the STT-MRAM. They are stemming from strict set of requirements imposed on the MTJ performance: simultaneously low switching current, high thermal stability, high magneto-resistance, low operation voltages, small probability of read-disturb, and long-term endurance. We will discuss the inter-dependencies of these parameters, and show how they are affected by varying magnetic properties of the stack layers. In particular, we study impact of the free layer anisotropy, magnetic moment, thickness, and Gilbert damping on switching current and thermal stability.

K-3:IL11  Magnetic Ratchet for Three-dimensional Spintronic Memory and Logic
D. PETIT, R. LAVRIJSEN, J.-H. LEE, R. MANSELL, A. FERNANDEZ-PACHECO, R.P. COWBURN, University of Cambridge, Cambridge, UK 

One of the major challenges for future electronic memory and logic devices is finding viable ways of moving from today’s 2D structures to 3D structures. A suggested solution is the shift register - a digital building block that passes data from cell to cell along a chain. We have discovered a way of implementing a 3D spintronic unidirectional vertical shift register between perpendicularly magnetized CoFeB layers [1]. By carefully controlling the thickness of each magnetic layer and the RKKY exchange coupling between layers we form a ratchet which allows information in the form of a sharp magnetic kink soliton to be pumped unidirectionally from one magnetic layer to another. In this talk I show experimental results from a 44-layer sample in which digital bits are injected into the bottom layer and then shifted from layer to layer before emerging from the top. I show how several bits can synchronously propagate through the same multilayer, how we can annihilate consecutive data bits and finally how we can use data bits to probe the magnetic properties of individual buried layers. This simple and efficient shift-register demonstrates a route for spintronics to be used to create 3D microchips for memory and logic applications.
[1] Cowburn et al, Nature 493, 647 (2013)

K-3:IL12  Controlling Domain Wall Motion by Electric Field in CoFeB-MgO Devices with Perpendicular Anisotropy
D. RAVELOSONA1, L. HERRERA DIEZ1, Y. LIU1, W. LIN1, J.P. ADAM1, N. VERNIER1, G. AGNUS1, B. OCKER2, J. LANGER2, E.E. FULLERTON3, 1Institut d'Electronique Fondamentale, Université Paris-Sud - CNRS, UMR8622, Orsay, France; 2Singulus Technologies AG, Kahl am Main, Germany; 3Center for Magnetic Recording Research, University of California San Diego, La Jolla, CA, USA   

One crucial breakthrough in spin electronics has recently been achieved regarding the possibility to move magnetic domain walls (DWs) in magnetic tracks using the sole action of an electrical current instead of a conventional magnetic field. Here, we will present our recent results of DW dynamics obtained in Ta-CoFeB-MgO nanodevices with perpendicular magnetic anisotropy (PMA), which are widely used in STT-RAM applications, and discuss the critical problems to be addressed for implementation into a memory device. Using NV center microscopy to map DW pinning along a magnetic wire, we will first show1 that Ta/CoFeB(1nm)/MgO structures exhibit a very low density of pinning defects with respect to others materials with PMA. Then, we will focus on the possibility to use Electric Field Effect to control domain wall motion with low power dissipation. We will demonstrate gate voltage modulation of DW dynamics using different approaches based on dielectrics2, piezoelectrics3 and ionic liquid layers. Finally, we will also show exploratory approaches based on EFE induced by functionalization of molecules.
1 J.P Tetienne et al, Science 344, 1366 (2014). 2 W.Lin et al, 3 N.Lei et al, Nat. Com. 4, 1378 (2013).

K-3:IL13  Integrating MTJ Devices into a 130nm CMOS Process Flow
M. BUCHBINDER, TowerJazz, Migdal Ha'emek, Israel 

A Magnetic Random Access Memory (MRAM) device was successfully embedded into TowerJazz’s 130nm CMOS platform. The fabricated devices are stand-alone 4Mbit and 1Mbit MRAM memories and Multi-MLU magnetic sensors. This talk will describe the process development challenges in adapting a standard 130nm Cu BEOL to incorporate the magnetic cell element, and the device sensitivities to processing. The main process challenges to be discussed are 1) formation of shallow damascene Cu contacts to the lower electrode; 2) patterning of the 150nm magnetic cell both lithography and etching of the magnetic stack; 3) planarization of the topography from the magnetic cell; 4) formation of dual damascene VIA’s to both the magnetic cell upper electrode and to the CMOS. Some electrical yield results of the stand-alone MRAM memory and magnetic sensors will be presented.
The work is a result of the joint effort of TowerJazz (Myriam Buchbinder, Ora Eli, Sagie Rozental, Yami Bouhnik, Shimon Greenberg) and Crocus Technology (Krish Mani, Yifat Cohen, Ken Mackay, Jeremy Pereira, Jeremy Alvarez Herault ) teams.

K-3:IL14  Multibit Self-referenced Thermally Assisted MRAM
Q. STAINER1,2, L. LOMBARD1, K. MACKAY1, C. DUCRUET1, S. BANDIERA1, R.C. SOUSA2, G. VINAY2, I.L. PREJBEANU2, B. DIENY2, 1Crocus Technology SA, Grenoble, France; 2SPINTEC, CEA/INAC, CNRS, Univ.Grenoble Alpes, Grenoble, France   

In MRAM chips, dot-to-dot variability remains a key problem. Self-reference schemes allow circumventing this problem by enabling the determination of the magnetic state of an addressed cell without comparison with an external reference cell. This is achieved in Thermally Assisted MRAM by using a soft unpinned reference layer (called here sense layer). The storage layer is an exchange biased layer which is written by a combination of heating pulse and magnetic field pulse. During reading, the magnetic state of the storage layer is determined by comparing the cell resistance values for two opposite orientations of the sense layer magnetization. These cells are called Magnetic Logic Unit (MLUs) since they combine memory and XOR functions. Several improvements to MLUs have been investigated by Crocus and SPINTEC. They concern: i) an improvement in the thermal variation of the pinning energy of the storage layer allowing to improve its retention without additional cost in write temperature; ii) a decrease in the write field amplitude obtained thanks to a new write procedure which uses the sense layer as a local amplifier of the write field; iii) an increase in the storage capacity achieved in MLU thanks to multibit recording either in single domain state or in vortex state.

K-3:L15  Toward Sub-20 nm Magnetic Tunnel Junction for Embedded Cache Memory

CPU performance can be improved by increasing its embedded cache memory density because the probability of cache misses decreases as the memory capacity increases. Our motivation for developing small magnetic tunnel junctions (MTJs) is to replace a conventional large-area, volatile SRAM cache memory with a high density, nonvolatile MRAM cache memory. For realizing small MTJs, two major issues have to be solved. One is to realize a very thin tunneling barrier in order to keep moderate MTJ resistance even with small MTJ size. Another is to fabricate small MTJs without increasing size variation. In our presentation, the thin tunneling barrier is realized by oxidation treatment after sputter-deposition of MgO. This additional treatment results in much reduced leakage current and enough write endurance of more than 1E16 cycles. The shrink process for small MTJs is also investigated from the point of scalability. After the MTJ (CoFeB/MgO/CoFeB) etching, various nitrogen or oxygen plasma treatments are done. During this plasma treatment, the sidewall surface of the MTJ is modified, which results in the small electrical MTJ size of around 20 nm. Proposed techniques are scalable and promising for sub-20 nm MTJ generation in high density cache MRAM application.

Session K-4 - Memristive Materials, Devices and Emerging Applications

K-4:IL01  Recent Investigations on the Response of a Tantalum Oxide Memristor to Different Excitations
R. TETZLAFF, Chair of Fundamentals of Electrical Engineering, Institute of Circuits and Systems, Faculty of Electrical and Computer Engineering, Technische Universität Dresden, Germany

Recent studies underline the importance of memristors in the development of future nanoelectronic circuits in order to overcome the limitations of conventional CMOS technology. Although, major efforts are focused on memory technology and on the implementation of learning strategies in neuromorphic circuits, the rich dynamical behavior of these nonlinear devices may be exploited in new nanoelectronic circuits for information processing. Necessarily, circuit development is based on accurate circuit theoretic based models of memristor devices constructed from different materials. Although, different models have been proposed, the analysis of their dynamical behavior is restricted to a few cases only. This contribution will provide an introduction to the theory of memristors. Additionally, by analyzing a model of a tantalum oxide memristor recently manufactured at Hewlett Packard (HP) Labs, a deeper insight into the dynamic behavior of this device was obtained showing a memory erase effect for different excitations. A detailed discussion of new theoretical results compared to those obtained in experiments will be given in the presentation.

K-4:L02  Memory Loss in a Tantalum Oxide Memristor
A. ASCOLI, R. TETZLAFF, Institut fuer Grundlagen der Elektrotechnik und Elektronik, TUD, Dresden, Germany; L.O. CHUA, Department of Electrical Engineering and Computer Sciences, University of California Berkeley, Berkeley, CA, USA; J.P. STRACHAN, R.S. WILLIAMS, Hewlett Packard Labs, Palo Alto, CA, USA

The tantalum oxide memristor may have a promising future as key element in innovative very-high speed ultra-low power extra-large density nonvolatile memories. It is therefore timely and relevant to investigate the nonlinear dynamics of this device in view of the interesting opportunities it may open up in the world of electronics in the years to come. In numerical simulations of an accurate model of the tantalum oxide memristor manufactured at Hewlett Packard Labs we observed a surprising phenomenon which was never reported earlier. Under suitable AC periodic excitation the memristor exhibits a unique asymptotic behaviour, irrespective of the initial condition. Thus the device may be stimulated in such a way to forget its past history. This memory erase effect, unexpected in a memristor device, is closely related to the concept of fading memory from nonlinear system theory, and was recently confirmed through experiments conducted on a sample device.

K-4:IL04  RRAM for New Computing Paradigms Beyond von Neumann Architecture
BIN GAO, J.F. KANG, Institute of Microelectronics, Peking University, Beijing, China

To meet the requirements of future big data processing and IoT application, innovations on hardware computing system becomes more and more important. Recently, RRAM based novel computing system beyond von Neumann architecture has attracted much attention due to its superior advantages such as energy-efficiency, multi-bit and parallel data processing potential, and the combination of memory and logic in one unit. We develop three kinds of non-von Neumann system based on RRAM. The “iMemComp” architecture executes traditional instructions without the need of developing new programming rule. In this architecture, logic and memory are combined in a RRAM array to avoid data transport via buses. Then we propose a multi-bit system to enhance the processing ability of iMemComp. A 2-bit adder is demonstrated on a RRAM device. Besides, we also develop RRAM based neuromorphic system with pattern recognition function. Unsupervised grey-scale image learning is performed on RRAM synapse network. The computing efficiency (power, speed, accuracy, etc) is evaluated on these systems. Optimized operation schemes on RRAM array correlated with device characteristics are presented to enhance system performance. This work demonstrates the feasibility and superiority of the RRAM based computing systems.

K-4:IL06  Learning Synapses and Neuromorphic Circuits using Oxide-based Resistive RAM
D. IELMINI, DEIB, Politecnico di Milano, Italy

Resistive switching memory (RRAM) are currently under consideration for storage class memories combining the high speed of SRAM and DRAM with the low cost and nonvolatile behavior of NAND Flash. Despite the remarkable progress in scaling and performance, RRAM are still to demonstrate sufficient reliability for digital memory applications. On the other hand, it has been proposed that RRAM might provide a scalable solution for tunable synapses in learning neuromorphic circuits, which are less demanding in terms of window budget, noise and variability. This work presents bio-inspired building blocks for RRAM-based synapses capable of spike communication and spike-timing dependent plasticity (STDP). Both 2-transistor-1-resistor (2T1R) and one-transistor/one-resistor (1T1R) circuits are presented, demonstrating state-dependent STDP and small circuit size. Low power is achieved by spike operation with low voltage pulses and low current thanks to filament control and scaling in RRAM. On-line unsupervised learning of hand-written characters according to the MNIST database is demonstrated by simulations of 2-layer and 3-layer neuromorphic networks. The impact of neuromorphic architecture and noise-driven distribution broadening is finally discussed.

K-4:L07  HfO2-based Memristive Device for Neuromorphic Computation
S. BRIVIO1, E. COVI1, M. FANCIULLI1,2, S. SPIGA1, 1Laboratorio MDM, IMM-CNR, Agrate Brianza, Italy; 2Dipartimento di Scienza Dei Materiali, Università di Milano Bicocca, Milano, Italy

The general trend towards portable devices interacting with one another and with the environment in real time requires computing paradigms that enable adaptation and learning together with a limited power consumption. This goal is achieved by hardware solutions mimicking the architecture of human brain, i.e. a network of neurons linked by synapses. These latter enable the plasticity function needed for learning and outnumber neurons by 3-4 orders of magnitude, which makes their practical realization in a nanoelectronic framework the most challenging task. Memristive systems come through as single synaptic units able to change their electric resistance between two artificial neurons in a plastic and non-volatile way in response of neuronal spike stimuli. In this context, we produced TiN/HfO2/Ti/TiN memristors that undergo gradual resistance transitions when stimulated by trains of identical voltage spikes. Such plastic resistance evolution is explained through a model of formation and dissolution of conductive filament shorting the two electrodes. Furthermore, spikes have been shaped to tune plasticity according to spike timing, which emulates one of the basic learning rule of human brain and has been used in the simulation of a neuromorphic network with learning capability.

K-4:L08  Synaptic Functionality of Nanoscale HfO2 based Memristors in Crossbars
Yu. MATVEYEV, R. KIRTAEV, A. FETISOVA, D. NEGROV, A. ZENKEVICH, Moscow Institute of Physics and Technology, Dolgoprudny, Moscow Region, Russia

Novel neural network hardware designs imply the use of memristors as electronic synapses in cross-bar architecture. In this work, we shall present recent results on the integration of nanoscale, down to 40x40 nm2 in size, Pt/HfO2(3 nm)/TiN-based memristors in cross-bar geometry, fabricated by the hybrid process combining optical and e-beam lithography. The process provides ~90% yield of nanodevices, which are forming-free (for a 3-nm-thick HfO2 layer), and survive up to 2.5*10^5 cycles without ROff/ROn degradation. For 3 nm-thick HfO2 devices, both SET/RESET memristive (gradual) switching following the series of identical biasing pulses (τ=2 µs) will be demonstrated, thus emulating “long term plasticity” property in biological synapses. Using previously developed methodology [1], spike-timing dependent plasticity (STDP) functionality is demonstrated for nanoscale memristors in cross-bar topology. Furthermore, the resistance dynamics for individual memristors in a cross-bar matrix following the switching pulse will be presented, including cross-talk phenomena. The presented synaptic functionalities of the fabricated memristors in crossbars indicate their applicability for the implementation of neural network hardware.
1. Yu. Matveyev et al., JAP 117 044901 (2015).

K-4:L09  Emulation of Neural Dynamics with Memristive Devices
M. ZIEGLER1, M. HANSEN1, M. IGNATOV1, A. PETRARU1, K. OCHS2, H. KOHLSTEDT1, 1Nanoelektronik, Technische Fakultät, Christian-Albrechts-Universität zu Kiel, Kiel, Germany; 2Lehrstuhl für Digitale Kommunikationssysteme, Ruhr-Universität Bochum, Bochum, Germany

Biological nerve systems of vertebrates and invertebrates outperform today’s most powerful digital computers when it comes to pattern recognition, cognitive functionality or autonomous interaction with a steadily changing and noisy environment. Memristive devices offer attractive features to mimic biological functions of nerve systems in an elegant and efficient way. In this talk the emulation of dynamic neural behaviours with memristive devices are discussed by presenting two examples. First, a spiking neuron model is presented, which has been experimentally realized in a compact circuit comprising memristive and memcapacitive devices and a pulse generator based on the strongly correlated electron material vanadium dioxide. The circuit can emulate dynamical spiking patterns in response to an external stimulus including adaptation, which is at the heart of firing rate coding as first observed by E.D. Adrian in 1926. Second, dynamic aspects of memorizing environmental changes and recalling past events are discussed in the framework of memristive oscillator systems. In particular, the electronic implementation of a memristive circuit model is presented, which describe anticipation events of unicellular organisms, as an precondition for the emulation of cognitive functionalities.

K-4:L10  Bismuth Ferrite Thin Films with Mobile and Fixed Donors for Novel Memory Applications
H. SCHMIDT1, TIANGUI YOU1, NAN DU1, D. BÜRGER1, I. SKORUPA1,2, T. MIKOLAJICK3, O.G. SCHMIDT1,4, 1Material Systems for Nanoelectronics, TU Chemnitz, Chemnitz, Germany; 2HZDR Innovation GmbH, Dresden, Germany; 3NaMLab gGmbH, Dresden, Germany; 4Institute for Integrative Nanosciences, IFW Dresden, Dresden, Germany

The ongoing research towards non-volatile memory devices has inspired many researchers to investigate different resistive switching mechanisms in oxide thin films. Here we present nonvolatile resistive switching without an electroforming process in two-terminal Ti-doped bismuth ferrite (BiFeO3) thin film structures [1]. Fixed Ti donors can effectively trap mobile donors in BiFeO3 if a writing voltage is applied [2]. The concentration of mobile and fixed donors is controlled during the BiFeO3 thin film synthesis, e.g. by Ar+ [3] and Ti+ ion irradiation. In a proof-of-principle experiment for BiFeO3 structures with one flexible and one unchangeable electrode we have demonstrated fast and energy-efficient spike-timing dependent plasticity for learning [4] and higher harmonics generation for hardware-based cryptography [5]. For BiFeO3 structures with two flexible electrodes we have demonstrated the nonvolatile reconfiguration of all 16 Boolean logic gates [6].
[1] Y. Shuai et al., Appl. Phys. Exp. 4 (2011); J. Appl. Phys. 109 (2011) [2] T. You et al., ACS Applied Materials & Interfaces 6 (2014); [3] Xin Ou et al., ACS Appl. Mater. Interfaces 5 (2013) [4] N. Du et al., Front Neurosci. 9 (2015) [5] N. Du et al., J. Appl. Phys. 115 (2014) [6] T. You et al., Adv. Funct. Mater. 24 (20

K-4:IL11  Phase Change Materials for Neuromorphic Computing
M. SALINGA, RWTH Aachen University, Aachen, Germany

In the endeavour to utilize the principles of biological neural networks in artificial circuits, the field of neuromorphic hardware embraces the fact that a neural network fully unfolds its potential when the neural attributes are incorporated in the hardware itself instead of running software emulating a neural network on common digital computers. While the application of phase change materials in electronic memories has already reached commercialization, the ideas about how to utilize this class of materials for neuromorphic hardware are still in their infancy. Most of them concentrate on identifying the variable transmission efficacy of synapses with the variable electrical conductance of a phase change memory cell. Here an overview of existing approaches will be given including a discussion of their advantages and limitations. Furthermore, the unique switching kinetics of phase change materials will be analysed with a particular emphasis on implications for their potential employment in neuromorphic circuit elements.

K-4:IL12  Non-von Neumann Computing using Phase Change Devices
A. SEBASTIAN, IBM Research - Zurich, Rüschlikon, Switzerland

Phase change memory (PCM) has recently emerged as a promising new nonvolatile solid-state memory technology. However, the applications of PCM devices could go well beyond memory. They exhibit significantly rich behavior governed by an intricate feedback interconnection of electrical, thermal and structural dynamics. There is also inherent stochasticity associated with the way these devices operate. In this talk I will present some examples where these devices can be utilized for computational tasks within the framework of neural networks and otherwise. PCM devices can serve as neuronal and synaptic elements in both artificial neural networks and spiking neural networks. It is also possible to use the state dynamics of an array of such devices to perform certain high level computational primitives with ultrahigh areal/power efficiency.
Sebastian, Le Gallo, Krebs, Nature Comm., 2014 Burr et al., IEDM Tech. Digest, 2014 Sebastian et al., Proc. IEEE IRPS, 2015 Hosseini, Sebastian et al., IEEE Electr. Dev. Lett., 2015

K-4:IL13  Artificial Synpases based on Ferroelectric Tunnel Junctions
V. GARCIA1, S. BOYN1, G. LECERF2, B. XU3, S. FUSIL1, L. BELLAICHE3, M. BIBES1, A. BARTHÉLÉMY1, S. SAÏGHI2, J. GROLLIER1, 1Unité Mixte de Physique, CNRS, Thales, Univ. Paris-Sud, Université Paris-Saclay, Palaiseau, France; 2Univ. Bordeaux, IMS, UMR 5218, Talence, France; 3Department of Physics and Institute for Nanoscience and Engineering, University of Arkansas, Fayetteville, Arkansas, USA

In the brain, learning is achieved through the ability of synapses to reconfigure the strength by which they connect two neurons. Artificial hardware with performances emulating those of biological systems requires electronic nanosynapses endowed with such plasticity. Promising solid state synapses are memristors, simple two-terminal nanodevices that can be finely tuned by voltage pulses. Their conductance evolves according to a learning rule called spike-timing-dependent plasticity, supposed to underlie unsupervised learning in our brains. Here, we report on purely electronic ferroelectric synapses based on ferroelectric tunnel junctions and show that spike-timing-dependent plasticity can be harnessed and tuned from intrinsically inhomogeneous ferroelectric polarization switching. Through combined scanning probe imaging, electrical transport experiments, and atomic-scale dynamic simulations, we demonstrate that conductance variations in such ferroelectric memristors can be accurately controlled and modeled by the nucleation-dominated switching of domains with opposite polarizations under electric fields. Our results show that ferroelectric nanosynapses are able to learn in a reliable and predictable way, opening the path towards unsupervised learning in spiking neural networks.

K-4:IL14  Ferroelectric Memristors for Neural Network Applications
Y. NISHITANI, Y. KANEKO, M. UEDA, Panasonic Corporation, Seika, Kyoto, Japan

Memristors have attracted attention as devices for brain-inspired computing hardware, such as artificial neural networks. Typical neural networks comprise multiple neurons interconnected via synapses. A synapse modulates the signal transmission strength, called “weight”, between two neurons. Weight controllability is essential to neural network adaptability. It is necessary to establish a synapse that can modulate its own electric conductance, which represents the weights. Our ferroelectric memrisotor has a back-gate thin-film transistor structure with a semiconductor ZnO/ ferroelectric Pb(Zr,Ti)O3 (PZT)/ conductive SrRuO3 oxide stack. PZT film polarization control using the gate voltage makes it possible to modulate the ZnO channel conductance in a nonvolatile manner, which can be regarded as weight controls. As an example of neural network applications, synapse chips were fabricated by integrating ferroelectric memrisotors on CMOS circuits. We then demonstrated on-chip associative memory function of 3x3 patterns using a neural network circuit with these chips. This demonstration suggests that the synapse chip is suitable for use as an artificial electronic synapse and is promising for realization of neural network hardware.

Poster Presentations

K:P02  Impact of Electrode and Oxide Thicknesses on the ReRAM Performance of Metal/TiOx/Al2O3/Metal Nano Cross-point Structures with Oxides grown by Atomic Layer Deposition
HEHE ZHANG, A. HARDTDEGEN, S. HOFFMANN-EIFERT, Forschungs-zentrum Juelich, PGI-7, and JARA-FIT, Juelich, Germany

Resistive switching devices (ReRAM) are discussed for next generation storage class memory due to the simple device structure and low power operation combined with non-volatility. For valence change (VCM) oxide devices TiO2 is one of the most intensively studied materials. TiO2 based resistive switching (RS) cells show a nonlinear current-voltage characteristic of the low resistance state (LRS) which is necessary for larger array devices. Starting with TiO2 integrated into nano-crossbar structures of Ti and TiN electrodes possibilities for improving the RS properties of the cells by introducing another thin metal oxide are studied. The oxide bilayer stacks are grown by atomic layer deposition which provides pinhole free films of a few nanometer thickness with the possibility for conformal covering 2D and 3D electrodes. Bilayer stacks of about 3 nm TiO2 and about 3 nm Al2O3, and single layers of these two oxides were integrated into nano-crossbar cell structures. By variation of the stack order and the electrode materials, the effects from electrode materials and oxide materials could be well separated. Additionally, the influence on the OFF/ON resistance ratio and the device stability were systematically studied.

K:P03  Charge Transport and Characterization of Freestanding Ge1Sb2Te4 Platelets integrated in Coplanar Strip Lines
M. MIKULICS1, M. SCHUCK1, P. JOST2, R. ADAM3, S. RIEß1, Y.C. ARANGO1, H. LÜTH1, D. GRÜTZMACHER1, H. HARDTDEGEN1, 1Peter Grünberg Institute (PGI 9) and JARA – Fundamentals of Future Information Technology, Forschungszentrum Juelich GmbH, Germany; 2I. Physikalisches Institut (IA), RWTH Aachen University; 3Peter Grünberg Institute (PGI 6) and JARA - Fundamentals of Future Information Technology

Currently, there is a growing interest in the development of data storage devices and circuits based on monocrystalline chalcogenides. They can be switched without thermally initialized structural changes. The switching consumes considerably less energy. However, the development and optimization of such material systems calls for alternative device processing and characterization techniques. A novel nanostructure-transfer technique was developed and will be reported with which epitaxially grown Ge1Sb2Te4 platelets were transferred from their native Si (111) substrate onto a sapphire-host substrate. The freestanding Ge1Sb2Te4 platelets were fully integrated into Ti/Au coplanar strip lines and electrically characterized. The aim was to study intrinsic material attributes and charge transport properties without any effect of the native substrate nor influence and interaction of chemical products needed in conventional lithographic processes. Highly resistive switching was observed without any detectable structural deterioration. Current densities exhibit values from 10-6 down to 10-11A/µm3 at 1V bias switching. Our study on freestanding Ge1Sb2Te4 platelets contributes to a better understanding of charge transport related physical phenomena in novel chalcogenides material systems.

K:P07  Improvement of FeRAM Capacitor Properties: Lead Excess Role and Two-step Crystallization Process 

Lead zirconate titanate (PZT) remains an important ferroelectric material in ferroelectric random access memory (FeRAM) due to a fairly low crystallization temperature and high remnant polarization. Electrical performance of FeRAM capacitors is governed by PZT crystalline structure. Normally PZT film has column structure with {111} and {100} preferable orientation depending on deposition process. Different kinds of seed layers may be used to stimulate nucleation process. Usually the lead titanate seed layer or the lead reach PZT one is used to promote nucleation. In this study we propose a different approach: two-step crystallization process based on low lead content seeding layer. Our motivation is to increase {111} texture as well as to avoid crystalline size decrease at the first step of crystallization and promote easy perovskite grain growth at the next one. Samples with a combination of seed layers with 0 and 5 wt.% Pb excess and the main layers with 15 and 30 wt.% Pb excess are formed. It is shown that the seed layer with low Pb content leads to improvement of PZT film polarization properties. For example, if the seed layer is formed with 5% Pb excess, and main film is deposited with 30% Pb excess, then the residual polarization is increased by ~ 30%.

K:HP11  Interfacial Phase-change Memory: Effects of Device Structure and Fabrication Conditions 
K.V. MITROFANOV, Y. SAITO, N. MIYATA, P. FONS, A. V. KOLOBOV, J. TOMINAGA, Systematic Materials Design Group, Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Japan

Evolution of phase-change memory has led to development of its newest incarnation – interfacial phase-change memory (iPCM). iPCM devices based on Ge-Sb-Te superlattices perform electrical and optical switching with improved cyclability, faster speed and lower energies required for switching than conventional phase-change memory [1]. It has been proposed that the improvement in performance was a result of the quasi one-dimensional confinement of the switching process allowing switching without melting and the concomitant entropic energy losses. Recently, transmission electron microscopy and extended x-ray absorption fine structure experiments [2, 3] have revealed evidence of the intermixing of Ge and Sb atoms in the superlattice structure. In the present work we have explored the ways of controlling of the extent of Ge/Sb atom intermixing in sputtered [(GeTe)2(Sb2Te3)4]8 superlattices and study the correlation between degree of intermixing and the performance of the corresponding iPCM devices. A variety of geometries and fabrication procedures were implemented as additional factors leading to iPCM performance improvement.
1. R.E. Simpson et al., Nat. Nanotech. 6, 501–505 (2011). 2. J. Momand et al., Nanoscale 7, 19136–19143 (2015). 3. B. Casarin et al., Sci. Rep. 6, 22353 (2016).

K:HP12  Electrochemical Reaction induced Synaptic Plasticity in Solid State Electrochemical Cells
DASHAN SHANG, CHUANGSEN YANG, YISHENG CHAI, LIQIN YAN, BAOGEN SHEN, YOUNG SUN, Institute of Physics, Chinese Academy of Sciences, Beijing, China

Solid state electrochemical cells with synaptic function have important applications in building smart-terminal networks. Here, the essential synaptic functions including potentiation and depression of synaptic weight, transition from short- to long-term plasticity, and spiking-time-dependent plasticity behavior were successfully realized in an Ag/MoOx/fluorine-doped tin oxide (FTO) cell with continual resistance switching. The synaptic plasticity underlying these functions was controlled by tuning the excitatory post-synaptic current (EPSC) decay, which is determined by the applied voltage pulse number, width, frequency, and intervals between the pre- and post-spikes. The physical mechanism of the artificial synapse operation is attributed to the interfacial electrochemical reaction processes of the MoOx films with the adsorbed water, where protons generated by the water decomposition under electric field diffused in the MoOx films and intercalated into the lattice, leading to the short- and long- term retention of the cell resistance, respectively. These results indicate the possibility of achieving smart artificial synapse with SSE cells and will contribute to the development of smart-terminal networking systems.

K:HP13  In3Sb1Te2 Phase-change Nanowires for Low Power Memory
S. SELMO1,2, R. CECCHINI1, C. WIEMER1, M. FANCIULLI1,2, E. ROTUNNO3, L. LAZZARINI3, A. LUGSTEIN4, M. LONGO1, 1Laboratorio MDM, IMM-CNR, Unità di Agrate Brianza, Agrate Brianza, (MB), Italy; 2Dipartimento di Scienza dei Materiali, University of Milano Bicocca, Milano, Italy; 3IMEM-CNR, Parma, Italy; 4FKE, TU-Wien, Wien, Austria

Phase change memories (PCMs) are emergent non-volatile storage devices based on chalcogenide materials in which the logic states are obtained by the different electrical resistance values of their amorphous and crystalline phases, reversibly induced by suitable current pulses. The possibility of downscaling PCMs by employing chalcogenide nanowires (NWs) is particularly appealing, as they allow a lower volume to be programmed and a lower electrode/active material contact area, leading to reduced set and reset currents. In this work the self-assembly of In3Sb1Te2 chalcogenide NWs (with diameters as small as 15nm) was achieved by metal organic chemical vapor deposition (MOCVD), catalyzed by Au nanoparticles. Phase change memory switching was reversibly induced by nanosecond current pulses and voltage sweeps through metal-contacted NWs with threshold voltages lower than 1 V. The reset writing current of these NW-based devices is about four times smaller than for PCM devices based on Ge2Sb2Te5 NWs of comparable size [Lee et al., Nat. Nanotechnology 2, 626 - 630 (2007)], while the reset power is as small as128 µW for In3Sb1Te2 NWs with ~ 25 nm diameter.

Cimtec 2016

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